This Article forms part of my “DCC for Engineers” series, and provides an introduction to the technical design aspect of the DCC (Digital Command Control) system.
Described in a nutshell, Digital Command Control works by combining the output of a power supply with digital instructions telling the locomotives and other accessories what to do, directly onto the tracks. Decoders, which are in fact small computers (or micro controllers), respond to instructions addressed to them. The decoders are installed in locomotives, or are larger stationary devices that can control signals and switch machines.
Edited & Reviewed: Stéfan Stoltz
1. Important Concepts:
- a DCC system applies a pure digital signal on the track.
- There are no high frequency carriers or audio tones present on the track
- The alternating digital signal contains not only the address and the instructions, but also supplies the power needed by the decoder(s) and motor(s)
- The digital waveform is created by your DCC system’s (command station).
- It is sent to a booster (or multiple boosters) where the DCC Commands are modulated onto the track power. That resulting higher voltage digital waveform is sent from the booster to the rails.
- The DCC decoder in the locomotive picks up the signal from the rails.
- The decoder has circuitry designed to process the DCC signal.
- The microprocessor the decoder is built around examines the data, and if it is addressed to it, acts on the instructions contained in the waveform.
- The decoder also rectifies the DCC signal into Direct Current to power the decoder, and applies power to the motor(s), under control of the microprocessor which is responding to the information encoded in the waveform.
- Each decoder has an address, and will only respond to commands addressed to it.
- Although Wireless DCC controllers have an RF transmitter in the hand (throttle), and an RF receiver that controls the DCC controller (command station). But the DCC Signal and power still goes through the booster and the rails.
THE NMRA DCC STANDARD
The NMRA DCC standard covers the format of the information sent via Digital Command Stations to Digital Decoders. A Digital Command Station transmits this information to Digital Decoders by sending a series of bits , using a digital signal. This sequence of bits, termed a packet, is used to encode a set of instructions that the Digital Decoder operates upon. Packets must be precisely defined to ensure that the intended instructions can be properly encoded and decoded.
2. Digital Command Control Packets
A packet is a bundle of data sent over the wires or rails in the case of model railroading. The concept is similar to sending a message via email.
A data packet is made of up Binary digits, or ‘BITS’. A group of eight bits is referred to as a byte. A word is typically two bytes or sixteen bits. Bytes can be split into nibbles (four bit units),which represent numbers between zero and fifteen. To make them easier to read nibbles are often represented by hexademical (base 16) numbers, from zero to F. A byte can represent 256 values from $00 to $FF
In the model railroading control system called Digital Command Control, packets are made up of several “words”, and most words are one or two bytes long.
- A DCC Packet is a defined group of signals. The technical term is a broadcast protocol.
- In the case of a broadcast protocol, the data is sent to all devices.
- Every packet consists of a minimum of 38 bits.
- The packet always begins with a preamble, in this case twelve bits representing a value of one are transmitted.
- No other DCC command can consist of twelve sequential bits set to equal 1.
- The command station will either transmit idle packets, or retransmit previous packets.
- No data, no track voltage.
- The command station will have logic in it that will determine the sequence and repetition of packets to insure that the bandwidth available is used efficiently
Structure of a DCC Data Packet
The DCC data packet consists of a preamble, the address and instruction, followed by the post amble.
The most common packets are four-word bundles.
- Preamble — Tells all decoders a data packet is about to start.
- Address — This sequence of bits contains the address of the decoder the packet it meant for.
- Instruction — The command that is being sent to the addressed decoder.
- Error Detection — This allows the decoder to check that the packet is valid, and if it is corrupted, the decoder will just ignore the packet and wait for the next preamble
sequence of events..
- When a decoder sees the preamble it immediately takes note.
- After the preamble the data bytes begin.
- The first segment is the address byte, the next segment is the instruction byte.
- The NMRA DCC standard only defines a few basic instructions.
- The final segment is the error correction byte.
- A typical packet consists of three or four data bytes, or 24 to 32 bits.
- The final segment is the packet end bit, equal to 1. Each byte is separated with a zero bit.
- The Preamble to a packet consists of a sequence of “1” bits.
- A digital decoder must not accept as a valid, any preamble that has less then 10 complete one bits
- A digital decoder will not accept a packet with more than 12 complete “1” bits
- A valid Preamble string, tells every device listening, that a new packet is starting.
- No other DCC command can or will consist of a string of twelve ones.
- A command station must send a minimum of 14 full preamble bits.
- The preamble is considered to be floating, and provides sync information to the devices, making the entire system self-synchronising without additional clock signals
Packet Start Bit
- The packet start bit is the first bit with a value of “0” that follows a valid preamble.
- The Packet Start Bit terminates the preamble and indicates that the next bits are an address data byte.
- The first data byte of the packet normally contains eight bits of address information.
- The first transmitted address bit shall be defined to be the most significant bit of the address data byte.
- The Address alerts the device the message is intended for, usually a decoder, or a consist (two or more locomotive decoders).It also tells all other devices to ignore this packet.
- The address can be one or two bytes in size.
- A two digit address is represented by a single byte, and two bytes are used for a four digit address.
- A decoder set for two digit addresses will ignore a two byte address.
- This allows compatibility with older systems that may not have four digit capability.
- If the address does not match the decoder, the decoder will simply ignore the data and wait for the next preamble to be transmitted.
- Address Data Bytes with values 00000000, 11111110, and 11111111 are reserved for special operations and must not be transmitted except as provided in the NMRA Standard or associated Recommended Practices.
Data Byte Start Bit
- This bit precedes a data byte and has the value of “0”
Data Byte / Instruction(s) Byte
- Each data byte contains eight bits of information used for address, instruction, data, or error detection purposes.
- The first transmitted data bit of each data byte shall be defined to be the most significant bit of the data byte.
- The Instruction byte tells the device to set a function (light, bell, whistle, horn, coupler, etc.) on or off, to change to a specified speed step, to reverse direction, to emergency stop, etc.
- Systems using 14 or 28 speed steps only need one byte for the instructions.
- For 128 speed steps, two bytes are required.
- The structure of the bytes differs to indicate the speed steps used.
Error Detection Byte
- The final byte indicates the packet is complete.
- It also allows the decoders to check the validity of the packet.
- If the packet is corrupted, a decoder looking at the final byte would find the checksum included is wrong.
- It would ignore the packet and wait for an uncorrupted one to arrive. (This is one reason why the command stations keep repeating the packets over time.)
- A corrupted packet most commonly occurs if dirty wheels or track prevented the whole packet from being read properly.
- The command station applies an XOR function to the address and instruction bytes, and this is appended to the packet to create the error detection byte.
- The decoder can perform the same function and compare the result to the error detection byte.
- When a decoder sees a string of 12 bits set to 1, followed by a zero, it immediately takes note.
- If the address byte matches the decoder’s address, it then processes the error correction byte, and if that is correct, it processes the commands it has received.
- By checking for errors, the decoder can reject a corrupt packet, caused by electrical noise or dirty track.
- Should a packet be rejected, the decoder will wait for another packet addressed to it.
- The error correction scheme cannot correct an error, it can only detect that the data is corrupt.
- Should the XOR operation fail, the packet is discarded and the decoder awaits a new one.
Packet End Bit This bit marks the termination of the packet and has a value of “1”
4. Putting It All Together
A complete data packet might look like this:
- 1111111111 0 0AAAAAAA 0 01DUSSSS 0 EEEEEEEE 1
AAAAAAA 0 = Address. The trailing zero (MSB) can be for the headlight.
DCC Packet Construction
|A= Address0 = Headlight||D=DirectionU=UndefinedS=Speed||XORed address and data bytes|
The 01 indicates the start of the data byte. D is Direction (bit 5), U is undefined. SSSS is the speed control. If in 28 step mode, U is used for the LSB. The 01 can also be used for accessory control, such as couplers, bells, etc. The Speed control in this example is 4 bits, for the optional 128 step mode, another 4 bits would be included. The 4 bits allow for the mandated 28 speed steps. All decoders can switch to 28 steps if the command station transmits them.
If SSSS equals zero, that is a STOP command. The eSTOP is 0001. Values from 2 to 16 are the the fourteen speed steps. In 28 step mode, the values would go from 2 to 30. In this case, stop is 00000, eStop is 00001, and the first step is 00010.
E is the Error Correction.
6. Special Commands
There are a couple of special commands that can be transmitted.
- The Reset Packet has an address and data value of zero and the XOR operation means an error byte of zero value.
- This packet allows the Command Station to clear some of its previous instructions.
- These include speed and direction data from any decoders.
- Upon receiving a reset packet a mobile decoder must bring a moving locomotive to an immediate stop.
- In practice reset packets are normally sent as part of the programming or start up procedures to clear and power a decoder prior to transmission of programming packets.
- An Idle packet differs from the reset packet in that the address byte is set to 7 High (1) states, and the data packet is all Low (0) States.
- The idle packet is used to provide power to the track when there are no trains in motion, or no locomotives have been addressed.
- DCC packets are transmitted at the rate of approximately 8000 bits per second or even higher.
- The command station tries to use the bandwidth available as efficiently as possible.
- Packets are prioritized by the command station to maximize the throughput.
- Packets are only created and transmitted when the command station receives instructions to make a change.
- A locomotive running at a constant speed would not have any packets addressed to it unless the throttle was changed to increase or reduce speed, lights turned on or off, or in the case of sound, a button was pressed to blow the horn (or whistle).
- This reduces the amount of data traffic, which increases response.
- DCC systems can transmit hundreds of packets a second, which allows control of a large number of trains. A large amount of data traffic will negatively impact the responsiveness of your train.
- A typical command station can queue up to 20 packets in the buffer, which are transmitted in sequence unless the system determines the need to transmit one packet sooner.
6. Other Issues
- Bandwidth is an issue taken into consideration during the design stages of the command station.
- he NMRA standard sets the timing, only so many bits per second can be sent.
- A command station will send about 180 three byte packets per second.
- Larger packets, such as those for 128 speed steps or sound commands, demand more time to send, thus they reduce the number of packets that can be sent every second.
- Operating a direct current locomotive in analog mode (without a decoder) further reduces the number of packets sent in a given period.
- On a large layout with a large number of locomotives in operation, this can become a problem.
- Command stations can address this issue by using techniques such as queuing.
- New packets are sent first, older packets are sent later.
- Properly done, several hundred trains can operate simultaneously with no noticeable problems. (The decoder will continue to do what it is doing until told otherwise.)
- Higher end command stations use even more logic to determine the order packets will be sent.
- Several innovations reduce the number of packets that must be sent, such as advanced consisting, which one packet addresses several decoders, decoder feedback, where a decoder acknowledges it has received a good packet, negating the need to send it again, and dual command packets, where several instructions can be combined into one packet.
- These techniques reduce the bandwidth demanded to operate large numbers of trains effectively.
7. DCC Power
- The DCC booster puts a digital signal on the track.
- This signal is there at all times, and is in the form of a square wave
- This means that all locomotives have power to their wheels, all the time.
- Instead of the voltage (and current) controlling the trains, a receiver (decoder) inside each locomotive listens for the commands sent out over the rails from the command station.
- These commands tell the decoder to make the train for go forward, reverse, fast, slow, or turn on/off lights or sounds.
- Many systems today combine the command station and booster into the same package, so do not be concerned if you don’t have a booster. The concept is the same.
With this setup, you control the trains and not (like with analog) the track.
Because of this, and the whole point of DCC as a whole, it is possible to control multiple trains on the same track without having to deal with complex wiring and control panels to isolate each section of track to control each train.
8. Baseline Packets
The Baseline Packets are included to provide the minimum interoperability between different systems. More complex packet formats that support different types of decoders, additional functions, addresses and speeds are provided in the Extended Packet Format Recommended Practice (RP-9.2.1). It is the intention of this Standard that, in order to conform:
- a Command Station must encode operator control input in conformance with the Baseline Packet semantics
- a Digital Decoder must recognize and provide suitable locomotive control electrical output in conformance with the Baseline Packet semantics. Digital Decoder Idle Packets and Digital Decoder Broadcast Stop Packets are optional for Command Stations, and required for decoders.
9. Speed and Direction Packet For Locomotive Decoders
Address Data Byte = 0AAAAAAA
- The address data byte contains the address of the intended recipient of the packet
- Every Digital Decoder shall be capable of retaining and recognizing its own address for purposes of responding to Baseline Packets.
- Locomotive Digital Decoders shall support the full range of baseline addresses in such a manner that this address is easily configurable by the user
- It is acceptable for Digital Command Stations to restrict the number of valid addresses supported so long as this restriction is clearly and plainly labeled on the package and in the instructions.
Instruction Data Byte = 01DCSSSS
- The instruction data byte is a data byte used to transmit speed and direction information to the locomotive Digital Decoder.
- Bits 0-36 provides 4 bits for speed (S) with bit “0” being the least significant speed bit.
- Bit four of byte 2 (C) by default shall contain one additional speed bit, which is the least significant speed bit.
- For backward compatibility, this bit may instead be used to control the headlight.
- This optional use is defined in RP-9.2.1. Bit 5 provides one bit for direction (D)
- When the direction bit (D) has a value of “1” the locomotive should move in the forward direction.
- A direction bit with the value of “0” should cause the locomotive to go in the reverse direction.
- Bits 7 and 6 contain the bit sequence “01” which are used to indicate that this instruction data byte is for speed and direction.
CS3S2S1S0 Speed CS3S2S1S0 Speed CS3S2S1S0 Speed CS3S2S1S0 Speed
00000 Stop 00100 Step 5 01000 Step 13 01100 Step 21
10000 Stop (I) 10100 Step 6 11000 Step 14 11100 Step 22
00001 E-Stop* 00101 Step 7 01001 Step 15 01101 Step 23
10001 E-Stop* (I) 10101 Step 8 11001 Step 16 11101 Step 24
00010 Step 1 00110 Step 9 01010 Step 17 01110 Step 25
10010 Step 2 10110 Step 10 11010 Step 18 11110 Step 26
00011 Step 3 00111 Step 11 01011 Step 19 01111 Step 27
10011 Step 4 10111 Step 12 11011 Step 20 11111 Step 28
• *Digital Decoders shall immediately stop delivering power to the motor.
60 • (I) Direction bit may be ignored for directional sensitive functions. (Optional)
Figure 2 Speed Table for Baseline Packet
Error Detection Data Byte = EEEEEEEE
- The error detection data byte is a data byte used to detect the presence of transmission errors.
- The contents of the Error Detection Data Byte shall be the bitwise exclusive OR of the contents of the Address Data Byte and the Instruction Data Byte in the packet concerned. (e.g. the exclusive OR of bit 0 of the address data byte and bit 0 of the instruction data byte will be placed in bit 0 of the error detection data byte…)
- Digital Decoders receiving a Baseline Packet shall compare the received error detection data byte with the bitwise exclusive OR of the received address and instruction data bytes and ignore the contents of the packet if this comparison is not identical
10. Digital Decoder Reset Packet
Digital Decoder Reset Packet For All Decoders
111111111111 000000000 0 00000000 0 00000000 1
Preamble Byte One Byte Two Byte Three (Error Detection Data Byte)
- A three byte packet, where all eight bits within each of the three bytes contains the value of “0”, is defined as a Digital Decoder Reset Packet.
- When a Digital Decoder receives a Digital Decoder Reset Packet, it shall erase all volatile memory (including any speed and direction data), and return to its normal power-up state.
- If the Digital Decoder is operating a locomotive at a non-zero speed when it receives a Digital Decoder Reset, it shall bring the locomotive to an immediate stop.
- Following a Digital Decoder Reset Packet, a Command Station shall not send any packets with an address data byte between the range “01100100” and “01111111” inclusive within 20 milliseconds, unless it is the intent to enter service mode
11. Digital Decoder Idle Packet For All Decoders
111111111111 0 11111111 0 00000000 0 11111111 1
Preamble Byte One Byte Two Byte Three (Error Detection Data Byte)
- A three byte packet, whose first byte contains eight “1”s, whose second byte contains eight “0”s and whose third and final byte contains eight “1”s, is defined as a Digital Decoder Idle Packet.
- Upon receiving this packet, Digital Decoders shall perform no new action, but shall act upon this packet as if it were a normal digital packet addressed to some other decoder.
12. Digital Decoder Broadcast Stop Packets For All Decoders
111111111111 0 00000000 0 01DC000S 0 EEEEEEEE 1
Preamble Byte One Byte Two Byte Three (Error Detection Data Byte)
- A three byte packet, whose first byte contains eight “0”s, whose second byte contains a specific stop command and whose third and final byte contains an error byte that is identical to the second byte of the packet, is defined as a Digital Decoder Broadcast Stop Packet.
- Upon receiving this packet where bit zero of byte two (S) contains a value of “0”, digital decoders intended to control a locomotive’s motor shall bring the locomotive to a stop.
- Upon receiving this packet where bit zero of byte two (S) contains a value of “1”, digital decoders intended to control a locomotive’s motor shall stop delivering energy to the motor.
- If bit four of byte 2 (C) contains a value of “1”, the direction bit contained in bit five of byte 2 (D) may optionally be ignored for all direction sensitive functions.
13. Frequency Of Packet Transmission
- Packets sent to Digital Decoders should be repeated as frequently as possible, as a packet may have been lost due to noise or poor electrical conductivity between wheels and rails.
- Power may also be removed from the rails between the Packet End Bit and the Preamble of the next packet to allow for alternative command control formats.
- A Digital Decoder shall be able to act upon multiple packets addressed to it, provided the time between the packet end bit of the first packet and the packet start bit of the second packet are separated by at least 5 milliseconds.
- If a decoder receives a bit sequence with a missing or invalid data byte start bit, a missing or invalid packet end bit, or an incorrect error detection byte, it must recognize the next valid preamble sequence as the beginning of a new packet.
- Alternative command control formats are specifically allowed between the packet end bit and the start of the next preamble.
- Manufacturers of decoders are encouraged to provide automatic conversion for a variety of power signals and command control formats in addition to the NMRA digital signal (per S-9.1), provided that automatic conversion to these alternate power signals can be disabled. If automatic conversion is enabled, Digital Decoders must remain in digital mode and not convert to using any alternate power signal so long as the time between Packet Start Bits is less than or equal to 30 milliseconds in duration.
- If automatic conversion is disabled, Digital Decoders must remain in digital mode regardless of the timing of Packet Start Bits.
- It shall be possible to configure Digital Command Stations to transmit at least one complete packet every 30 milliseconds as measured from the time between packet start bits